In the digital circuit design, memories are often used in, but not limited to, data buffering, being a temporary media for data transferring among different computing modules, etc. During a same memory cycle in a real time operation system, a module may write data to a memory in one address and another module may read data from the memory in another address for operations. In this situation, the functionality able to read data from and write data to the memory at the same time be provided. In general, a multi-port memory, such as a two-port memory may be employed to perform the functionality. The structure of a two-port memory has two input ports, which may simultaneously input related signals needed for the read and write operations. Designers may control the read and write control signals properly, and apply these control signals to the two-port memory. Simultaneously storing data to and reading data from the memory may be easily achieved. For example, on the write port, a write enable signal may accompany with a write address signal and a write data signal. When the write enable signal is at logic high, this two port memory may write the write data to a relative position. On the read port, a read enable signal may accompany with a read address signal. When the read enable signal is at logic high, this two-port memory may reads out the data in an address during the next clock cycle.
The two-port memory may simultaneously perform a memory write operation and a memory read operation within a clock cycle. The single-port memory may only perform a memory read or write operation within a clock cycle. When an Application-Specific Integrated Circuit (ASIC) tapes out and the memory capacity is too large, a single-port memory device operable to provide multi-port functionality may be one of solutions to the issue.